LSI U160 Manuel d'utilisateur télécharger pdf (Page 15)

3.75 pc 10.25 pc 11.25 pc 38.25 pc

4.333 pc

48.583 p

52.5 pc

34.5 pc

44.25 pc

Features 1-3

• Bursts up to 264 Mbytes/s (@ 33 MHz) with zero wait-state bus

master data

• Supports the PCI Cache Line Size (CLS) register

• Prefetches up to 8 Dwords of SCRIPTS instructions

• Supports PCI Write and Invalidate, Read Line, and Read Multiple

commands

• Bursts SCRIPTS opcode fetches across the PCI bus

• Supports universal 3.3 V and 5 V PCI bus voltage

• Complies with PCI Bus Power Management Specification Revision 1.1

• Complies with PC99

1.2.2 SCSI Interface

The SCSI interface includes these features:

• Performs wide, Ultra160 SCSI synchronous data transfers as fast as

160 Mbytes/s using Double Transition (DT) clocking

• Supports Cyclic Redundancy Check (CRC) checking and generation

in DT phases

• Protects nondata phases with Asynchronous Information

Protection (AIP)

• Automatically enables LVD or SE termination

• Contains external 68-pin High Density (HD) and internal 68-pin HD

latching connectors

• Provides SCSI termination power (TERMPWR) source with

autoresetting circuit protection device

• Supports Basic (level 1), Enhanced (level 2), and Margined (level 3)

Domain Validation

• Includes integrated LVDlink™ universal transceivers:

– Supports 16-bit SE and LVD signals

– Allows greater device connectivity and longer cable length

– LVDlink transceivers save the cost of external differential

transceivers

– Supports a long-term performance migration path

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LSI U160 Manuel d'utilisateur Page 15