LSI 53C875A manuels

Lsi 53C875A Manuel d'utilisateur (328 pages)

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Table des matières

LSI53C875A

1

PCI to Ultra SCSI

1

Controller

1

TECHNICAL

1

Preface iii

3

Preface v

5

Revision Date Remarks

5

Contents

7

Contents ix

9

Contents xi

11

Contents xiii

13

Chapter 1

15

General Description

15

1-2 General Description

16

1.2 Benefits of Ultra SCSI

17

Technology

18

1.3 TolerANT

18

1.4.1 SCSI Performance

19

1.4.2 PCI Performance

20

1.4.3 Integration

20

1.4.4 Ease of Use

20

1.4.5 Flexibility

21

1.4.6 Reliability

22

1.4.7 Testability

22

Chapter 2

23

Functional Description

23

2.1.1 PCI Addressing

24

2-6 Functional Description

28

2-8 Functional Description

30

2.1.3 PCI Cache Mode

31

2-10 Functional Description

32

Read Example 3 –

36

Write Example 1 –

36

Write Example 2 –

37

2.2.1 SCRIPTS Processor

39

2.2.2 Internal SCRIPTS RAM

40

2-20 Functional Description

42

2-22 Functional Description

44

2.2.10 SCSI Loopback Mode

45

2.2.11 Parity Options

46

, as a PCI master, detects a

47

Table 2.4 SCSI Parity Control

48

2.2.12 DMA FIFO

49

2-28 Functional Description

50

2-30 Functional Description

52

Counter, which consists of

53

2.2.13 SCSI Bus Interface

54

(UC5614 for Ultra SCSI)

55

(UC5610 for Ultra SCSI)

55

2.2.15 Synchronous Operation

56

2-36 Functional Description

58

2.2.16 Interrupt Handling

59

2-38 Functional Description

60

2-40 Functional Description

62

2-42 Functional Description

64

2.2.17 Chained Block Moves

66

2-46 Functional Description

68

2.3 Parallel ROM Interface

70

2.4 Serial EEPROM Interface

72

2.5 Power Management

73

2.5.1 Power State D0

74

2.5.2 Power State D1

74

2.5.3 Power State D2

75

2.5.4 Power State D3

75

2-54 Functional Description

76

Chapter 3

77

Signal Descriptions

77

3-2 Signal Descriptions

78

3.2 Signal Descriptions

79

3.3 PCI Bus Interface Signals

80

3.3.4 Arbitration Signals

83

3.3.5 Error Reporting Signals

83

3.3.6 Interrupt Signal

84

3.4.2 SCSI Signals

85

3.4.3 SCSI Control Signals

85

3.5 GPIO Signals

86

3.7 Test Interface Signals

88

3.8 Power and Ground Signals

89

3.9 MAD Bus Programming

90

MAD Bus Programming 3-15

91

3-16 Signal Descriptions

92

Chapter 4

93

Registers

93

Registers:0x00–0x01

94

Registers:0x02–0x03

95

Registers:0x04–0x05

95

4-4 Registers

96

Registers:0x06–0x07

97

Registers:0x09–0x0B

99

Register: 0x0D

100

Register: 0x0E

100

Register: 0x0F

100

Registers:0x10–0x13

101

Registers:0x14–0x17

101

Registers:0x18–0x1B

102

Registers:0x1C–0x27

102

Registers:0x28–0x2B

102

Registers:0x2C–0x2D

102

Registers:0x2E–0x2F

103

Registers:0x30–0x33

104

Register: 0x34

105

Registers:0x35–0x3B

105

Register: 0x3C

105

Register: 0x3D

106

Register: 0x3E

106

Register: 0x3F

106

Register: 0x40

107

Register: 0x41

107

Registers:0x42–0x43

107

Registers:0x44–0x45

108

Register: 0x46

109

4.2 SCSI Registers

110

SCSI Registers 4-19

111

Register: 0x00

112

SCSI Registers 4-21

113

4-22 Registers

114

Register: 0x01

115

4-24 Registers

116

SCSI Registers 4-25

117

Register: 0x02

118

SCSI Registers 4-27

119

Register: 0x03

120

Register: 0x04

122

Register: 0x05

123

÷ 25 = 4

124

used by

125

Register: 0x06

127

Register: 0x07

127

Register: 0x08

128

Register: 0x09

129

Register: 0x0A

130

Register: 0x0B

130

Register: 0x0C

131

4-40 Registers

132

SCSI Registers 4-41

133

Register: 0x14

140

SCSI Registers 4-49

141

4-50 Registers

142

Register: 0x15

143

Register: 0x16

144

Register: 0x17

144

Register: 0x18

145

Register: 0x19

145

Register: 0x1A

146

SCSI Registers 4-55

147

Register: 0x1B

148

Registers:0x1C–0x1F

149

Register: 0x20

149

4-58 Registers

150

Register: 0x21

151

Register: 0x22

152

SCSI Registers 4-61

153

Register: 0x23

154

Registers:0x24–0x26

154

Register: 0x27

155

Registers:0x2C–0x2F

156

Registers:0x34–0x37

157

Register: 0x38

158

4-68 Registers

160

Register: 0x39

161

Register: 0x3A

162

Register: 0x3B

162

SCSI Registers 4-71

163

4-72 Registers

164

Registers:0x3C–0x3F

165

4-74 Registers

166

Register: 0x42

168

SCSI Registers 4-77

169

Register: 0x43

170

Register: 0x44

171

Register: 0x45

173

Register: 0x47

174

Register: 0x48

175

Register: 0x49

177

Register: 0x4A

178

Register: 0x4B

178

Register: 0x4C

179

Register: 0x4D

180

Register: 0x4E

181

4-90 Registers

182

Register: 0x4F

183

4-92 Registers

184

Registers:0x50–0x51

185

Register: 0x52

186

Register: 0x53

186

Registers:0x54–0x55

186

Register: 0x56

187

4-96 Registers

188

Register: 0x57

189

Registers:0x58–0x59

190

4.3 64-Bit SCRIPTS Selectors

191

Registers:0xA0–0xA3

192

Registers:0xA4–0xA7

193

Registers:0xA8–0xAB

193

Registers:0xAC–0xAF

194

Registers:0xB0–0xB3

194

Registers:0xB4–0xB7

195

Registers:0xB8–0xBB

195

Registers:0xBC–0xBF

195

Registers:0xC0–0xC3

196

Registers:0xC4–0xC7

196

Registers:0xC8–0xCB

197

Registers:0xCC–0xCF

197

Registers:0xD0–0xD3

198

Registers:0xD4–0xD7

199

Registers:0xD8–0xDA

199

Register: 0xDB

200

Registers:0xDC–0xDF

200

Registers:0xE0–0xFF

200

Chapter 5

201

SCSI SCRIPTS

201

Instruction Set

201

5.2.1 Sample Operation

203

Figure 5.1 SCRIPTS Overview

205

5.3 Block Move Instruction

206

Block Move Instruction 5-7

207

Command Byte Count

207

Address of Data

207

Address of Pointer to Data

207

Command Not Used

208

Don’t Care Table Offset

208

00 Byte Count

208

Physical Data Address

208

Block Move Instruction 5-9

209

OPC Instruction Defined

209

0 MOVE/MOVE64

209

1 CHMOV/CHMOV64

209

Block Move Instruction 5-11

211

5.4 I/O Instruction

213

5.4.1 First Dword

214

I/O Instruction 5-15

215

I/O Instruction 5-17

217

and synchronous period are

218

= combination to produce the

219

Command Table Offset

220

Absolute Jump Offset

220

5.4.2 Second Dword

221

5.5 Read/Write Instructions

222

5.5.2 Second Dword

223

5.6.1 First Dword

226

5.7 Memory Move Instructions

232

5.7.1 First Dword

233

5.7.3 Second Dword

234

5.7.4 Third Dword

235

5.8.1 First Dword

236

5.8.2 Second Dword

237

Chapter 6

239

Electrical

239

Specifications

239

Table 6.3 Input Capacitance

240

DEVSEL/,STOP/,PERR/,PAR

242

TEST_RST, TMS, TRST/

242

Table 6.8 Output Signal—TDO

242

6-8 Electrical Specifications

246

6.3 AC Characteristics

247

Figure 6.7 Reset Input

248

Table 6.13 Reset Input

248

Table 6.14 Interrupt Output

248

• Target Timing

249

• Initiator Timing

249

• External Memory Timing

250

6.4.1 Target Timing

251

(Driven by LSI53C875A)

254

6.4.2 Initiator Timing

257

6.4.3 External Memory Timing

273

(Addr Driven by LSI53C875A;

282

≤= 128 Kbytes) Read Cycle

286

≤= 128 Kbytes) Write Cycle

287

≤ 128 Kbytes) Write Cycle

287

≤ 64 Kbytes ROM Read Cycle

288

≤= 64 Kbytes ROM Read Cycle

288

≤ 64 Kbyte ROM Write Cycle

289

≤= 64 Kbyte ROM Write Cycle

289

6.5 SCSI Timing Diagrams

290

SCSI Timing Diagrams 6-57

295

6.6 Package Diagrams

296

Package Diagrams 6-59

297

Package Diagrams 6-61

299

Appendix A

301

Register Summary

301

A-6 Register Summary

306

Appendix B

307

External Memory

307

Interface Diagram

307

Examples

307

IX-2 Index

312

Numerics

313

IX-4 Index

314

Index IX-5

315

IX-6 Index

316

Index IX-7

317

IX-8 Index

318

Index IX-9

319

IX-10 Index

320

Customer Feedback

321

U.S. Distributors

323

(Continued)

324

Direct Sales

325

Representatives by State

325

(Component and HAB)

325

Sales Offices and Design

326

Resource Centers

326

♦Tel: 46.8.444.15.00

327

♦Tel: 44.1344.426544

327

♦Sales Offices with

327

♦Tel: 612.9953.9844

328

♦Tel: 91.80.664.5530

328

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